Arbitrarily fast delayed signal cancellation PLL for grid‐integration of renewable energy sources

Integrating renewable energy sources into an unbalanced distribution network requires fast and accurate extraction of fundamental frequency positive‐ and negative‐sequence components from the unbalanced three‐phase grid voltage signals. For this purpose, various methods are already available in the literature. Out of them, delayed signal cancellation (DSC) is prevalent. Conventional DSC can separate the sequence components using a quarter‐cycle delay. Fast DSC tools can achieve the same with less than a quarter‐cycle delay. However, neither conventional nor fast DSC can handle DC offset without requiring additional delayed signals. This article addresses this issue by proposing a modified DSC to estimate the sequence components with DC offset rejection and having arbitrarily fast convergence speed, that is, low memory requirement. Two equidistant delayed samples of the measured grid voltages/currents are required to implement the proposed technique and can easily be applied in a phase‐locked loop (PLL). Comparative experimental results demonstrate the suitability of the proposed approach over other DSC methods.