Porth Ymchwil

Nanopore test circuit for single-strand DNA sequencing

Allbwn ymchwil: Cyfraniad at gynhadledd › Papur

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Nanopore test circuit for single-strand DNA sequencing. / Palego, C.; Hwang, J.C.; Merla, C. et al.
2012. 101-104 Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012.

Allbwn ymchwil: Cyfraniad at gynhadledd › Papur

HarvardHarvard

Palego, C, Hwang, JC, Merla, C, Apollonio, F & Liberti, M 2012, 'Nanopore test circuit for single-strand DNA sequencing', Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012, 3/01/01 tt. 101-104. https://doi.org/10.1109/SiRF.2012.6160154

APA

Palego, C., Hwang, J. C., Merla, C., Apollonio, F., & Liberti, M. (2012). Nanopore test circuit for single-strand DNA sequencing. 101-104. Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012. https://doi.org/10.1109/SiRF.2012.6160154

CBE

Palego C, Hwang JC, Merla C, Apollonio F, Liberti M. 2012. Nanopore test circuit for single-strand DNA sequencing. Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012. https://doi.org/10.1109/SiRF.2012.6160154

MLA

Palego, C. et al. Nanopore test circuit for single-strand DNA sequencing. IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012, 03 Ion 0001, Papur, 2012. https://doi.org/10.1109/SiRF.2012.6160154

VancouverVancouver

Palego C, Hwang JC, Merla C, Apollonio F, Liberti M. Nanopore test circuit for single-strand DNA sequencing. 2012. Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012. doi: 10.1109/SiRF.2012.6160154

Author

Palego, C. ; Hwang, J.C. ; Merla, C. et al. / Nanopore test circuit for single-strand DNA sequencing. Papur a gyflwynwyd yn IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012.

RIS

TY - CONF

T1 - Nanopore test circuit for single-strand DNA sequencing

AU - Palego, C.

AU - Hwang, J.C.

AU - Merla, C.

AU - Apollonio, F.

AU - Liberti, M.

PY - 2012/1/16

Y1 - 2012/1/16

N2 - A nanopore test circuit is proposed for single-strand DNA sequencing, which allows real-time sensing of the electric conductance of individual sections of a DNA strand as it is pulled through the nanopore by an electric current at a controlled speed. The test circuit is based on a planar microchamber with a nanochannel drilled through its multilayer graphene electrode by an electron beam. The nanochannel is self-aligned with a nanopore created in the lipid bilayer membrane of liposomes by nanosecond electric pulses. Simulation shows that by carefully controlling the magnitude, period, and repetition rate of the pulses, the diameter of the nanopore can be optimized for the best speed the DNA is pulled through the nanopore.

AB - A nanopore test circuit is proposed for single-strand DNA sequencing, which allows real-time sensing of the electric conductance of individual sections of a DNA strand as it is pulled through the nanopore by an electric current at a controlled speed. The test circuit is based on a planar microchamber with a nanochannel drilled through its multilayer graphene electrode by an electron beam. The nanochannel is self-aligned with a nanopore created in the lipid bilayer membrane of liposomes by nanosecond electric pulses. Simulation shows that by carefully controlling the magnitude, period, and repetition rate of the pulses, the diameter of the nanopore can be optimized for the best speed the DNA is pulled through the nanopore.

U2 - 10.1109/SiRF.2012.6160154

DO - 10.1109/SiRF.2012.6160154

M3 - Paper

SP - 101

EP - 104

T2 - IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Santa Clara, USA, 16-18 Jan 2012

Y2 - 3 January 0001

ER -