FPGA techniques for algorithm acceleration
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41 MB, PDF document
Abstract
The techniques necessary for the hardware implementation of systems which
would traditionally be implemented in software are investigated, with regard to
two systems: an image processor and an electronic neuron model. The latter is
developed in detail and it is shown that a simplified and space-efficient model can
perform the functions of more complex models. Interesting results are shown and
novel methods of building with these models are demonstrated.
would traditionally be implemented in software are investigated, with regard to
two systems: an image processor and an electronic neuron model. The latter is
developed in detail and it is shown that a simplified and space-efficient model can
perform the functions of more complex models. Interesting results are shown and
novel methods of building with these models are demonstrated.
Details
| Original language | English |
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| Awarding Institution |
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| Supervisors/Advisors |
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| Award date | Oct 2007 |