Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices
Allbwn ymchwil: Cyfraniad at gynhadledd › Papur
Fersiynau electronig
Dangosydd eitem ddigidol (DOI)
We report on the fabrication and characterization of a pentacene and poly(4-vinyl phenol) (PVP) based metal-insulator-semiconductor (MIS) memory structures. The surface morphology of pentacene grown on a thin layer of PVP showed the largest polycrystalline grains as compared to other dielectric materials such as polymethyl-metacrylate (PMMA) or SU8. The effect of larger grain size of pentacene was reflected in the capacitance-voltage (C-V) characteristics of the devices, where devices with larger pentacene grains showed lower operating voltages and a steeper slope of the depletion region of the C-V curve. The introduction of solution-processed gold nanoparticles (AuNPs) embedded within the PVP layer induced the memory characteristics as it served as a floating gate in the MIS Al/PVP/AuNPs/PVP/Pentacene/Au structure. The C-V characteristics of the memory devices exhibit a clockwise hysteresis due to the charging and discharging of AuNPs from the aluminium gate through the PVP insulator layer. A memory window of 8.5V was achieved at a ±10V voltage sweep range; wider memory windows were achieved at higher voltage sweep ranges. The memory devices have hysteresis centred close to 0V and a short depletion region which make it favourable for low voltage and fast operation in organic and flexible electronics applications.
Iaith wreiddiol | Saesneg |
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Tudalennau | 1-5 |
Dynodwyr Gwrthrych Digidol (DOIs) | |
Statws | Cyhoeddwyd - 20 Awst 2012 |
Digwyddiad | 12th IEEE Conference on Nanotechnology : IEEE-NANO - Birmingham, Y Deyrnas Unedig Hyd: 20 Awst 2013 → 23 Awst 2013 http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6310163 |
Cynhadledd
Cynhadledd | 12th IEEE Conference on Nanotechnology |
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Teitl cryno | IEEE-NANO |
Gwlad/Tiriogaeth | Y Deyrnas Unedig |
Dinas | Birmingham |
Cyfnod | 20/08/13 → 23/08/13 |
Cyfeiriad rhyngrwyd |