Single-walled nanotube MIS memory devices

Allbwn ymchwil: Cyfraniad at gynhadleddPapur

Fersiynau electronig

Dangosydd eitem ddigidol (DOI)

  • D.T. Ashall
  • M. Alba-Martin
  • T. Firmager
  • J.J. Atherton
  • M.C. Rosamond
  • A.J. Gallant
  • M.C. Petty
  • A. Al Ghaferi
  • A. Ayesh
  • D. Ashall
  • M.F. Mabrook
  • D.A. Zeze
Single-Walled carbon nanotubes (SWCNTs) were embedded in hybrid Metal-Insulator-Semiconductor (MIS) memory devices using layer-by-layer (LbL) deposition with polymethylmethacrylate (PMMA) as an organic insulator. It is demonstrated that shortened SWCNTs lead to reliable and large memory windows by virtue of better encapsulation which reduces charge leakage compared with longer SWCNT devices. The capacitance-voltage (C-V) characteristics exhibit a clockwise hysteresis, indicative of electron injection into the SWCNT charge storage elements through the PMMA layer. It is also shown that devices made using sodium dodecyl sulphate (SDS)-based SWCNTs and polyethyleneimine (PEI) produce memory windows larger than 6 V, have a high charge retention of 76% and a storage density better than 2×1012/cm2.
Iaith wreiddiolSaesneg
Tudalennau991-995
Dynodwyr Gwrthrych Digidol (DOIs)
StatwsCyhoeddwyd - 15 Awst 2011
DigwyddiadNanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011 -
Hyd: 3 Jan 0001 → …

Cynhadledd

CynhadleddNanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011
Cyfnod3/01/01 → …
Gweld graff cysylltiadau