Porth Ymchwil

Single-walled nanotube MIS memory devices

Allbwn ymchwil: Cyfraniad at gynhadledd › Papur

StandardStandard

Single-walled nanotube MIS memory devices. / Ashall, D.T.; Alba-Martin, M.; Firmager, T. et al.
2011. 991-995 Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011.

Allbwn ymchwil: Cyfraniad at gynhadledd › Papur

HarvardHarvard

Ashall, DT, Alba-Martin, M, Firmager, T, Atherton, JJ, Rosamond, MC, Gallant, AJ, Petty, MC, Al Ghaferi, A, Ayesh, A, Ashall, D, Mabrook, MF & Zeze, DA 2011, 'Single-walled nanotube MIS memory devices', Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011, 3/01/01 tt. 991-995. https://doi.org/10.1109/NANO.2011.6144530

APA

Ashall, D. T., Alba-Martin, M., Firmager, T., Atherton, J. J., Rosamond, M. C., Gallant, A. J., Petty, M. C., Al Ghaferi, A., Ayesh, A., Ashall, D., Mabrook, M. F., & Zeze, D. A. (2011). Single-walled nanotube MIS memory devices. 991-995. Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011. https://doi.org/10.1109/NANO.2011.6144530

CBE

Ashall DT, Alba-Martin M, Firmager T, Atherton JJ, Rosamond MC, Gallant AJ, Petty MC, Al Ghaferi A, Ayesh A, Ashall D, et al. 2011. Single-walled nanotube MIS memory devices. Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011. https://doi.org/10.1109/NANO.2011.6144530

MLA

Ashall, D.T. et al. Single-walled nanotube MIS memory devices. Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011, 03 Ion 0001, Papur, 2011. https://doi.org/10.1109/NANO.2011.6144530

VancouverVancouver

Ashall DT, Alba-Martin M, Firmager T, Atherton JJ, Rosamond MC, Gallant AJ et al.. Single-walled nanotube MIS memory devices. 2011. Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011. doi: 10.1109/NANO.2011.6144530

Author

Ashall, D.T. ; Alba-Martin, M. ; Firmager, T. et al. / Single-walled nanotube MIS memory devices. Papur a gyflwynwyd yn Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011.

RIS

TY - CONF

T1 - Single-walled nanotube MIS memory devices

AU - Ashall, D.T.

AU - Alba-Martin, M.

AU - Firmager, T.

AU - Atherton, J.J.

AU - Rosamond, M.C.

AU - Gallant, A.J.

AU - Petty, M.C.

AU - Al Ghaferi, A.

AU - Ayesh, A.

AU - Ashall, D.

AU - Mabrook, M.F.

AU - Zeze, D.A.

PY - 2011/8/15

Y1 - 2011/8/15

N2 - Single-Walled carbon nanotubes (SWCNTs) were embedded in hybrid Metal-Insulator-Semiconductor (MIS) memory devices using layer-by-layer (LbL) deposition with polymethylmethacrylate (PMMA) as an organic insulator. It is demonstrated that shortened SWCNTs lead to reliable and large memory windows by virtue of better encapsulation which reduces charge leakage compared with longer SWCNT devices. The capacitance-voltage (C-V) characteristics exhibit a clockwise hysteresis, indicative of electron injection into the SWCNT charge storage elements through the PMMA layer. It is also shown that devices made using sodium dodecyl sulphate (SDS)-based SWCNTs and polyethyleneimine (PEI) produce memory windows larger than 6 V, have a high charge retention of 76% and a storage density better than 2×1012/cm2.

AB - Single-Walled carbon nanotubes (SWCNTs) were embedded in hybrid Metal-Insulator-Semiconductor (MIS) memory devices using layer-by-layer (LbL) deposition with polymethylmethacrylate (PMMA) as an organic insulator. It is demonstrated that shortened SWCNTs lead to reliable and large memory windows by virtue of better encapsulation which reduces charge leakage compared with longer SWCNT devices. The capacitance-voltage (C-V) characteristics exhibit a clockwise hysteresis, indicative of electron injection into the SWCNT charge storage elements through the PMMA layer. It is also shown that devices made using sodium dodecyl sulphate (SDS)-based SWCNTs and polyethyleneimine (PEI) produce memory windows larger than 6 V, have a high charge retention of 76% and a storage density better than 2×1012/cm2.

U2 - 10.1109/NANO.2011.6144530

DO - 10.1109/NANO.2011.6144530

M3 - Paper

SP - 991

EP - 995

T2 - Nanotechnology (IEEE-NANO), 11th IEEE Conference, Portland OR., 15-18 August, 2011

Y2 - 3 January 0001

ER -