Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices

Research output: Contribution to conferencePaper

Standard Standard

Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. / Sleiman, Adam; Albuquerque, A.; Fakher, S. J. et al.
2012. 1-5 Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom.

Research output: Contribution to conferencePaper

HarvardHarvard

Sleiman, A, Albuquerque, A, Fakher, SJ & Mabrook, M 2012, 'Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices', Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom, 20/08/13 - 23/08/13 pp. 1-5. https://doi.org/10.1109/NANO.2012.6322160

APA

Sleiman, A., Albuquerque, A., Fakher, S. J., & Mabrook, M. (2012). Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. 1-5. Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom. https://doi.org/10.1109/NANO.2012.6322160

CBE

Sleiman A, Albuquerque A, Fakher SJ, Mabrook M. 2012. Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom. https://doi.org/10.1109/NANO.2012.6322160

MLA

Sleiman, Adam et al. Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. 12th IEEE Conference on Nanotechnology , 20 Aug 2013, Birmingham, United Kingdom, Paper, 2012. https://doi.org/10.1109/NANO.2012.6322160

VancouverVancouver

Sleiman A, Albuquerque A, Fakher SJ, Mabrook M. Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. 2012. Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom. doi: 10.1109/NANO.2012.6322160

Author

Sleiman, Adam ; Albuquerque, A. ; Fakher, S. J. et al. / Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices. Paper presented at 12th IEEE Conference on Nanotechnology , Birmingham, United Kingdom.

RIS

TY - CONF

T1 - Gold nanoparticles as a floating gate in Pentacene/PVP based MIS memory devices

AU - Sleiman, Adam

AU - Albuquerque, A.

AU - Fakher, S. J.

AU - Mabrook, Mohammed

PY - 2012/8/20

Y1 - 2012/8/20

N2 - We report on the fabrication and characterization of a pentacene and poly(4-vinyl phenol) (PVP) based metal-insulator-semiconductor (MIS) memory structures. The surface morphology of pentacene grown on a thin layer of PVP showed the largest polycrystalline grains as compared to other dielectric materials such as polymethyl-metacrylate (PMMA) or SU8. The effect of larger grain size of pentacene was reflected in the capacitance-voltage (C-V) characteristics of the devices, where devices with larger pentacene grains showed lower operating voltages and a steeper slope of the depletion region of the C-V curve. The introduction of solution-processed gold nanoparticles (AuNPs) embedded within the PVP layer induced the memory characteristics as it served as a floating gate in the MIS Al/PVP/AuNPs/PVP/Pentacene/Au structure. The C-V characteristics of the memory devices exhibit a clockwise hysteresis due to the charging and discharging of AuNPs from the aluminium gate through the PVP insulator layer. A memory window of 8.5V was achieved at a ±10V voltage sweep range; wider memory windows were achieved at higher voltage sweep ranges. The memory devices have hysteresis centred close to 0V and a short depletion region which make it favourable for low voltage and fast operation in organic and flexible electronics applications.

AB - We report on the fabrication and characterization of a pentacene and poly(4-vinyl phenol) (PVP) based metal-insulator-semiconductor (MIS) memory structures. The surface morphology of pentacene grown on a thin layer of PVP showed the largest polycrystalline grains as compared to other dielectric materials such as polymethyl-metacrylate (PMMA) or SU8. The effect of larger grain size of pentacene was reflected in the capacitance-voltage (C-V) characteristics of the devices, where devices with larger pentacene grains showed lower operating voltages and a steeper slope of the depletion region of the C-V curve. The introduction of solution-processed gold nanoparticles (AuNPs) embedded within the PVP layer induced the memory characteristics as it served as a floating gate in the MIS Al/PVP/AuNPs/PVP/Pentacene/Au structure. The C-V characteristics of the memory devices exhibit a clockwise hysteresis due to the charging and discharging of AuNPs from the aluminium gate through the PVP insulator layer. A memory window of 8.5V was achieved at a ±10V voltage sweep range; wider memory windows were achieved at higher voltage sweep ranges. The memory devices have hysteresis centred close to 0V and a short depletion region which make it favourable for low voltage and fast operation in organic and flexible electronics applications.

U2 - 10.1109/NANO.2012.6322160

DO - 10.1109/NANO.2012.6322160

M3 - Paper

SP - 1

EP - 5

T2 - 12th IEEE Conference on Nanotechnology

Y2 - 20 August 2013 through 23 August 2013

ER -